Digital Design Part 3

4th→ assembler translate it to the machine language.

1.6 [20] <§1.6> Consider two different implementations of the same instruction
set architecture. Te instructions can be divided into four classes according to
their CPI (class A, B, C, and D). P1 with a clock rate of 2.5 GHz and CPIs of 1, 2, 3,
and 3, and P2 with a clock rate of 3 GHz and CPIs of 2, 2, 2, and 2.
Given a program with a dynamic instruction count of 1.0E6 instructions divided
into classes as follows: 10% class A, 20% class B, 50% class C, and 20% class D,
which implementation is faster?
a. What is the global CPI for each implementation?
b. Find the clock cycles required in both cases.  



Class A
Class B
Class C
Class D
Clock Rate
P1
1
2
3
3
2.5*10^9
P2
2
2
2
2
3.0*10^9

CPI .1
.2
.5
.2

Which one is faster?
Cpu time = I * (CPI)Clock Rate
→ P1→ 1.04 *10^-3  | P2 → 6.67 * 10^-4  → p2 is faster
Global CPI = CPU TIME * clock rateNumber of instruction → p1 → 2.6 | p2 → 2.001
Number of Clock Cycle = Global CPI * Number of instruction
P1→ 2.6 * 10^6  | p2 → 2.001* 10^6
1.7 [15] <§1.6> Compilers can have a profound impact on the performance
of an application. Assume that for a program, compiler A results in a dynamic
instruction count of 1.0E9 and has an execution time of 1.1 s, while compiler B
results in a dynamic instruction count of 1.2E9 and an execution time of 1.5 s.
a. Find the average CPI for each program given that the processor has a clock cycle
time of 1 ns.
b. Assume the compiled programs run on two different processors. If the execution
times on the two processors are the same, how much faster is the clock of the
processor running compiler A’s code versus the clock of the processor running
compiler B’s code?  





Chapter 2

instruction set : The vocabulary of commands understood by a given architecture.
stored-program concept: The idea that instructions and data of many types can be stored in memory as numbers, leading to the stored program computer.
word: The natural unit of access in a computer, usually a group of 32 bits; corresponds to the size of a register in the MIPS architecture.
Unlike programs in high-level languages, the operands of arithmetic instructions
are restricted; they must be from a limited number of special locations built directly
in hardware called registers.


data transfer: instruction A command that moves data between memory and registers. address A value used to delineate the location of a specific data element within a memory array.
In MIPS, words must start at addresses that are multiples of 4. Tis requirement
is called an alignment restriction, and many architectures have it.


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